Motorola SN54 Demultiplexer Logic Diagram and Datasheet
Motorola SN54 Demultiplexer Logic Diagram and Datasheet - Motorola SN54/74LS138 known to be 1-of-8 decoder or demultiplexer which is designed for high speed bar memory chip select address decoding. Below diagram illustrates logic diagram of this SN54/74LS138 demultiplexer.
According to the SN54 datasheet, multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four LS138s and one inverter.
A0–A2 Address Inputs
E1, E2 Enable (Active HIGH) Input
E3 Enable (Active LOW) Inputs
O0–O7 Active LOW Outputs
Pin 16 VCC
Pin 8 Ground (GND)
Motorola SN54/74LS138 datasheet can be download through this link: http://maven.smith.edu/~thiebaut/270/datasheets/sn74ls138rev5.pdf
Tags: LS138s, Motorolla 74LS138, 74ls138 datasheet, SN54 datasheet, sn54 logic diagram, sn54 decoder datasheet, 74LS138 demultiplexer,