Tunable Filter Circuit Diagram

Tunable Filter Circuit Diagram This circuit uses a clock generator to control four analog CMOS switches. The switches in turn vary the input resistance of each opamp. These analog switches are controlled by a 555 clock generator with a duty cycle that is variable from 1:10 up to 100:1. If the analog switch is closed, the input resitance is around 60 ohms and when it is open, the resistance is almost infinite. If, for example, the switch is clocked with a duty cycle of 0.5, the resulting input resistance is 1/(0.5/60) = 120 ohms. If it is 0.25, the resistance is 240 ohms. It shows that every half of the dutry cycle results to a doubling of the input resistance.
tunable-filter-circuit-diagram
Tunable Filter Circuit Diagram

Tunable Filter Circuit Diagram

This circuit uses a clock generator to control four analog CMOS switches. The switches in turn vary the input resistance of each opamp.

These analog switches are controlled by a 555 clock generator with a duty cycle that is variable from 1:10 up to 100:1.

If the analog switch is closed, the input resitance is around 60 ohms and when it is open, the resistance is almost infinite.

If, for example, the switch is clocked with a duty cycle of 0.5, the resulting input resistance is 1/(0.5/60) = 120 ohms. If it is 0.25, the resistance is 240 ohms.

It shows that every half of the dutry cycle results to a doubling of the input resistance.

The frequency of the clock signal must be several times higher than the highest audio frequency to be processed to avoid hearing the resulting interference between the clock and the audio signals.

The amplification is around 40 and is dependent on the clock frequency.